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ee:pcbdesign [2019/01/07 10:26]
FKR@staff.hsrw
ee:pcbdesign [2023/11/28 12:30] (current)
FKR@staff.hsrw
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 +====== PCB design guidelines ======
 [[https://​hackaday.io/​project/​6936-pcb-design-guidelines|Hackaday PCB Design Guidelines write-up]] [[https://​hackaday.io/​project/​6936-pcb-design-guidelines|Hackaday PCB Design Guidelines write-up]]
  
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 [[https://​www.aetzwerk.de/​eagle|Ätzwerk files for EAGLE design rule check]] [[https://​www.aetzwerk.de/​eagle|Ätzwerk files for EAGLE design rule check]]
  
 +==== Design considerations for self-etched PCBs at the university ====
  
 +The biggest PCB blanks we stock at the university are 160 mm by 100 mm. Your designs should not be bigger than that.
  
 Available sizes for punching vias in the university: 0.6 mm (drill 0.9 mm, pad 1.5 mm) and 1.0 mm (drill 1.5 mm, pad 2.5 mm). Available sizes for punching vias in the university: 0.6 mm (drill 0.9 mm, pad 1.5 mm) and 1.0 mm (drill 1.5 mm, pad 2.5 mm).
 +Große Nieten (Innendurchmesser = 1 mm):
 +
 +Passendes Via:
 +Bohrung (= Bohrlochdurchmesser):​ 1,5 mm
 +Durchmesser (= Außendurchmesser):​ 2,5 mm
 +
 +
 +Kleine Nieten (Innendurchmesser = 0,6 mm):
 +
 +Passendes Via:
 +Bohrung (= Bohrlochdurchmesser):​ 0,9 mm
 +Durchmesser (= Außendurchmesser):​ 1,5 mm
 +
 +
 +Through-hole (THT) components need to be routed to at the bottom layer.
 +
 +===== Common mistakes =====
 +Trust in autorouter
 +
 +Wrong track size
 +
 +Use of discontinued or unavailable components
 +
 +No prototyping/​simulation
  
ee/pcbdesign.1546853219.txt.gz · Last modified: 2021/03/08 13:39 (external edit)