ee:pcbdesign
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ee:pcbdesign [2021/03/03 11:00] FKR@staff.hsrw |
ee:pcbdesign [2021/10/08 09:36] FKR@staff.hsrw |
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| [[https://www.aetzwerk.de/eagle|Ätzwerk files for EAGLE design rule check]] | [[https://www.aetzwerk.de/eagle|Ätzwerk files for EAGLE design rule check]] | ||
| + | ==== Design considerations for self-etched PCBs at the university ==== | ||
| Available sizes for punching vias in the university: 0.6 mm (drill 0.9 mm, pad 1.5 mm) and 1.0 mm (drill 1.5 mm, pad 2.5 mm). | Available sizes for punching vias in the university: 0.6 mm (drill 0.9 mm, pad 1.5 mm) and 1.0 mm (drill 1.5 mm, pad 2.5 mm). | ||
| + | Große Nieten (Innendurchmesser = 1 mm): | ||
| + | |||
| + | Passendes Via: | ||
| + | Bohrung (= Bohrlochdurchmesser): 1,5 mm | ||
| + | Durchmesser (= Außendurchmesser): 2,5 mm | ||
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| + | Kleine Nieten (Innendurchmesser = 0,6 mm): | ||
| + | |||
| + | Passendes Via: | ||
| + | Bohrung (= Bohrlochdurchmesser): 0,9 mm | ||
| + | Durchmesser (= Außendurchmesser): 1,5 mm | ||
| + | |||
| + | |||
| + | Through-hole (THT) components need to be routed to at the bottom layer. | ||
| ===== Common mistakes ===== | ===== Common mistakes ===== | ||
ee/pcbdesign.txt · Last modified: 2023/11/28 12:30 by FKR@staff.hsrw
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