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--- ee:pcbdesign [2019/01/07 10:23]
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+++ ee:pcbdesign [2023/11/28 12:30]
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+====== PCB design guidelines ======
+[[https://hackaday.io/project/6936-pcb-design-guidelines|Hackaday PCB Design Guidelines write-up]]
+Perform you submit a PCB for manufacturing please perform ERC (electrical rule check) and DRC (design rule check). As the standard rules in EAGLE are not precise please use these files for DRC:
 [[https://www.aetzwerk.de/eagle|Ätzwerk files for EAGLE design rule check]]
-[[https://hackaday.io/project/6936-pcb-design-guidelines|Hackaday PCB Design Guidelines write-up]]
+==== Design considerations for self-etched PCBs at the university ====
+The biggest PCB blansk we stock at the university are usually 160 mm by 100 mm. Your designs should not be bigger than that.
 Available sizes for punching vias in the university: 0.6 mm (drill 0.9 mm, pad 1.5 mm) and 1.0 mm (drill 1.5 mm, pad 2.5 mm).
+Große Nieten (Innendurchmesser = 1 mm):
+Passendes Via:
+Bohrung (= Bohrlochdurchmesser): 1,5 mm
+Durchmesser (= Außendurchmesser): 2,5 mm
+Kleine Nieten (Innendurchmesser = 0,6 mm):
+Passendes Via:
+Bohrung (= Bohrlochdurchmesser): 0,9 mm
+Durchmesser (= Außendurchmesser): 1,5 mm
+Through-hole (THT) components need to be routed to at the bottom layer.
+===== Common mistakes =====
+Trust in autorouter
+Wrong track size
+Use of discontinued or unavailable components
+No prototyping/simulation
-http://www.octamex.de/shop/download/Verarbeitungsanleitung_fuer_Dynamask.pdf

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